Stupid FET question

[sonicmojo]

When looking at tech sheets on some FETs, I get confused. For example, in this case of a 3 prong FET with one flat side, is the diagram orientation looking down from the top or with the prongs up?

1=Gate
2=Source
3=Drain

[markr14850]

What's the part number? Google around for a different datasheet for it.

(If it's a J111, that's the top view.)

[sliberty]

I suspect that the two parallel lines in the picture on the right represent the flat part of the body. If I am correct, then I think the pins would be 1=D, 2=G and 3=S

[selloutrr]

I suspect that the two parallel lines in the picture on the right represent the flat part of the body. If I am correct, then I think the pins would be 1=D, 2=G and 3=S

Correct

[sonicmojo]

I suspect that the two parallel lines in the picture on the right represent the flat part of the body. If I am correct, then I think the pins would be 1=D, 2=G and 3=S

I had my numbers right from the spec sheet.

Sorry if I am being thick, but I can interpret that 2 different ways depending on which way I am looking at the darn thing! Is the part of the diagram that states the pin numbers top view or bottom? Assuming the flat side is facing us, is this right then?

Here is the actual datasheet I am referring to:

http://www.datasheetcatalog.org/datashe ... PN4416.pdf

[martin manning]

My best guess is the view showing the pin numbering is from the bottom. The drawing does not conform to the usual practices of orthographic projections though. That view should be placed on the other side of the side view, so it is confusing.

[markr14850]

Not sure if it helps, but here's an alternate datasheet for the 4416: http://www.linearsystems.com/datasheets/2N4416.pdf

[sliberty]

With the flat side facing you (thus the parallel lines are visible), the top pin is #1, middle pin is #2 and bottom pin is #3. To the right, you see another figure that shows the schematic. Since the top part of the schematic aligns with pin 1, that means that pin 1 is D. The middle part of the schematic aligns with pin 2, so pin 2 is G, and the bottom part of the schematic aligns with pin 3, so pin 3 is S.

But hey, I could be wrong ....

[Aurora]

Standard notation for transistors..... looking "into" the pins...

[vibratoking]

Deleted my errant "facts".

[markr14850]

The gate or base of every three pin transistor package that I have ever seen is the middle pin.

But in this case the datasheet lists the gate as pin 1.

Here is the actual datasheet I am referring to:

http://www.datasheetcatalog.org/datashe ... PN4416.pdf

At this point, I'd suggest that the easiest way is take a breadboard, a 9v battery, a couple of 10k trimmers, and just figure it out by testing.

[vibratoking]

But in this case the datasheet lists the gate as pin 1.

Oops...I stand corrected. The datasheet does indeed show pin 1 as the gate. I edited my post above to remove that statement to avoid confusion in the future.

[martin manning]

The drawing does not conform to the usual practices of orthographic projections though. That view should be placed on the other side of the side view, so it is confusing.

I disagree for the reasons listed above. The drawing makes perfect sense.

No way. Well, ok, maybe in France. http://en.wikipedia.org/wiki/Multiview_ ... projection

[Cliff Schecht]

FET's are typically pinned out as drain-source-gate. It's always good to check the datasheet but I assume this if I have to assume anything. I think it's done like this because having the gate as the middle pin can make it hard to access sometimes.

In more modern SMD packaging manufacturers offer different pinout options for the same package, especially with multiple diode on a single substrate type IC's.

[vibratoking]

OK, my original post in this thread was almost fully inaccurate. Martin, thank you for the link and the correction.

I removed my nonsense above.